E-mail: editor@ijeetc.com; nancy.liu@ijeetc.com
Prof. Pascal Lorenz
University of Haute Alsace, FranceIt is my honor to be the editor-in-chief of IJEETC. The journal publishes good papers which focus on the advanced researches in the field of electrical and electronic engineering & telecommunications.
2024-11-13
2024-10-24
2024-09-24
Manuscript received April 25, 2024; revised June 6, 2024; accepted June 12, 2024.
Abstract—An analog network classifier based on a multiplier and non-linear functions is presented in this paper, executing binary classification on breast cancer cells, and categorizing biopsies as benign or malignant tumors. An off-chip learning on-chip inference methodology is proposed for implementing a feed-forward analog artificial neural network based on fundamental design analog block circuits, realized with the aid of 90 nm CMOS technology. These circuits are meticulously designed and fine-tuned at the transistor scale to meet design criteria while minimizing power consumption. Through Spice simulations, the basic analog blocks were developed, leading to the specification of the full-chip hardware neural network. The Monte Carlo analysis of the final circuit reveals that the network achieves 96.85% accuracy and 0.9309 MCC on the Wisconsin breast cancer dataset, with a power consumption of 31.95 μW, and power supply rail of ±900 mV per analog circuit component and computational unit. The model effectively captures data patterns, providing stable, reliable, and robust predictions.