E-mail: editor@ijeetc.com; nancy.liu@ijeetc.com
Prof. Pascal Lorenz
University of Haute Alsace, FranceIt is my honor to be the editor-in-chief of IJEETC. The journal publishes good papers which focus on the advanced researches in the field of electrical and electronic engineering & telecommunications.
2024-11-13
2024-10-24
2024-09-24
Manuscript received November 29, 2022; revised December 26, 2022; accepted December 30, 2022.
Abstract—Nowadays, Satellite remote sensing and especially earth observation satellites require improvement when implementing an algorithm using reconfigurable hardware in terms of efficiency, performance, and security level. Furthermore, the transmission of the computed data from the earth observation satellite to the ground station is subject to potential attacks, and data can be corrupted during transmission. The land surface Temperature algorithm is an essential factor that can be extracted from the earth observation satellite. In this paper, we proposed a secure land surface temperature implementation by combining the advanced encryption algorithm and Hamming code implemented on radiation-tolerant Virtex-4QV field programmable gate array (FPGA). The iterative looping technique was used to implement the Advanced Encryption Standard (AES) algorithm with the aim of achieving high throughput and high security levels. The results showed that the proposed hardware implementation consumes 3319 Slices and 2 BRAMs while achieving higher throughput of 1854.82 Mbps. Moreover, we have evaluated the efficiency of the suggested cryptosystem by exploiting security measurement analysis such as Histogram, correlation coefficient, entropy, number of pixels change rate (NPCR), and unified averaged changed intensity (UACI). The proposed cryptosystem results prove the efficiency in terms of hardware consumed and high-security level. This implementation may be utilized, proposed, and even configurable for any earth observation satellites, including nano- and pico-CubeSats since we employed radiation-tolerant FPGA.